Chip Design Data Management

Chip Design Data Management



IC Manage Global Design Platform (GDP)



IC Manage Global Design Platform (GDP) is a reliable, scalable, multi-site design management system. It enables complex global design across the enterprise.

Multi-site Collaboration.

IC Manage GDP allows the tracking and viewing of design modules by different designers. It offers easy branching and merging capability, including the full project history of files or data types. Design teams can find prior working versions and restore them to a prior working version. GDP offers a unique near real-time content delivery mechanism as part of its multi-site design collaboration support. It manages the bi-directional change management between ‘parent and child’, and can automatically detect and propagate the appropriate content for any workspace in a highly reliable and maintenance-free manner.


GDP is a unified system for hardware and software design. It manages revisions of all data types, including binary data, RTL, software, and EDA databases. IC Manage’s hardware design solution is built on Perforce, a leading industry standard SCM, so all developers can follow a unified model for all data types. Design teams can push or pull common data to any site. Actions can be executed via a GUI or a command line interface.

IP Reuse and Logistics Management.

Making an organisation’s intellectual property available for reuse by all its design teams is critical to be competitive. IC Manage’s IP Central lets teams rapidly publish and integrate their IP into existing flows, and trace bugs and dependencies. Close collaboration between project managers, IP owners, chip designers, and verification teams is also possible. More on IP Central

Managing Bug Dependencies.

GDP is tightly linked with bug tracking systems,including JIRA or Bugzilla. This ensures that all bugs and fixes associated with each design element or IP block are automatically recorded in both the bug tracking system, and in GDP. Chip designers can use GDP to manage bugs and their interdependencies in a bi-directional manner. The IP changes associated with the bug fixes can be viewed in the tracking system. The bug history can be viewed in the IP Central repository. This allows design teams to identify bugs, trace bug dependencies and propagated fixes with across all versions and designs throughout the enterprise. Chip designers can be automatically notified of new bugs that are identified as well as the status. Bug fixes can be automatically or selectively propagated to the various versions in use.

View Managing Bug Dependencies demo

See the full IC Manage GDP Datasheet

See a GDP Highlights demo

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